We are a deep-tech startup for the breakthrough development of a new non-cellular 5G wireless microchip. Massive IoT describes a future in which billions or even trillions of smart devices are connected together. While this is still a dream today, the DECT NR+ microchip developed by Last Mile Semiconductor is a technical prerequisite for making this vision a reality.
A unique opportunity awaits you to join our Dresden-based startup for groundbreaking new non-cellular 5G wireless microchip development.
* We offer *
Working in a fresh Start-Up where we do new wireless System-on-Chip design from scratch
You have the opportunity to actively shape a future technology – Non-cellular 5G network can be deployed anywhere, anytime, by anyone!
Permanent position with a high level of personal responsibility and excellent development opportunities
Work in an international, friendly and motivated team, which will be happy to support you in all questions
Flat hierarchies, we are open to change and welcome your ideas
An appreciative corporate culture characterised by a high degree of team spirit and trust, regular team events
Flexible and family-friendly working environment
An attractive salary, additional benefits to your salary and corporate benefits
Free job or Germany ticket or job bike (monthly allowance of € 55) as well as free use of the gym in the building.
Bright and comfortable office space in a central location (close to the main train station and TU Dresden)
Fresh coffee, fruit, juices or a beer after work? You are welcome to help yourself!
(SENIOR-) DIGITAL DESIGN ENGINEER (m/f/x)
YOUR TASKS
- Participation in the definition our System-on-Chip architecture
- Responsibility for the RTL design of digital blocks and their integration on system level
- Development and verification of our wireless System-on-Chip solution
- Support and execution of functional verification on chip and block level
- Support during product qualification, test and ramp-up
- Documentation during development
- Working in an international team (good English skills are necessary)
TOOLS, TECHNOLOGIES AND REQUIREMENTS
- Bachelors degree in electrical/electornics engineering or comparable
- Sound knowledge in ASIC/FPGA SoC architecture, digital design and verification
- Programming languages: SystemVerilog, Verilog, VHDL
- Experience in development of verification methodologies and infrastructures for automated testbenches
- Experience in synthesis for various target technologies is a plus
PLL Senior Design Engineer (m/f/x)
YOUR TASKS
We are seeking qualified PLL designers to work on the next generation DECT NR+ microchip. You will be part of a dynamic RF, analog/mixed-signal team engaged in design and productization utilizing cutting-edge FD-SOI process technology nodes.
- Understand system level requirements to create overall PLL specifications.
- Create behavioral models of PLL to drive architectural decisions and derive block-level requirements for analog and digital blocks.
- Work closely with the layout design team to implement layout views of designs.
- Top-level simulations.
- Run pre-tapeout verification flows to confirm design meets performance, power, reliability and timing requirements.
- Define production/bench-level test plans for post-silicon characterization.
- Work with lab engineers in taking lab measurements to validate IP.
- Review ATE and lab test results to resolve yield issues and drive bug fixes.
- Work with system teams in system bringup and debug.
- Hold design reviews of blocks with peers/management to show design meets spec targets and requirements.
TOOLS, TECHNOLOGIES AND REQUIREMENTS
The ideal candidate should have proven taking chips to production with experience in the following areas:
- Charge-pump PLL designs, Fractional-N PLLs, spread-spectrum PLLs, Digital PLL techniques, etc.
- Good knowledge of band gaps, bias, op-amps, LDOs, feedback and compensation techniques.
- Experience in DCO/ VCO design.
(SENIOR-) RFIC DESIGN ENGINEER OR ANALOG RF ASIC DESIGN ENGINEER (m/f/x)
YOUR TASKS
- As an RF IC design engineer, you will be a key member of our RFIC team, designing, and bringing our wireless SoCs into high-volume production at advanced CMOS technology nodes
- Design of analog and/or RFIC blocks
- Overseeing the layout and verifying the design to ensure a successful tape-out
- Testing the design and debugging the issues that may arise from early development stages through productisation
- Working with the system group to define the requirements for RF and baseband blocks based on the system requirements
- Working with the technology team to understand the capabilities and limits of the technology node to achieve optimum performance
- Support for product qualification, testing and ramp-up
- Documentation
TOOLS, TECHNOLOGIES AND REQUIREMENTS
- Completed studies in electrical engineering or a comparable qualification
- Experience in the area of RF/Analog IC design with advanced CMOS technology nodes. Experience in 22FDX is a plus
- Understanding of RFIC circuit design. Direct tape-out experience with one or more of the following blocks: RF front-end circuits, PA, LNA, mixer, oscillator, PLL, LO, VGA, filter, TIA, and/or other baseband analog blocks in deep sub-micron CMOS technology
- Knowledge of analog design concepts such as analysis of noise, linearity, mismatch, stability and other analog impairments
- Familiar with CMOS device physics, RF device modelling, device noise parameters, inductor modelling
- Insights into packaging effects, supply isolations, high frequency ESD structures, and circuit layout for optimum RF performance
- Familiarity with various RF transceiver architectures and their trade-offs, as well as calibration methods used for different RF transceiver architectures
- Familiarity with Cadence Virtuoso, Spectre RF, EMX and similar tools
- Understanding of system specifications and ability to work with system architects to translate system requirement into circuit requirement at IC level
- Experience in Silicon characterization and debug
HAVE WE SPARKED YOUR INTEREST?
Then please get in touch – your contact person for this position is Jessica.
We look forward to hearing from you!
Phone: +49 173 2859985
E-Mail: email hidden; JavaScript is required